x86/Viridian: don't mark IRQ vectors as pending when vLAPIC is disabled
authorJan Beulich <jbeulich@suse.com>
Tue, 20 Dec 2022 12:44:38 +0000 (13:44 +0100)
committerJan Beulich <jbeulich@suse.com>
Tue, 20 Dec 2022 12:44:38 +0000 (13:44 +0100)
commit5810edc049cd5828c2628a377ca8443610e54f82
treefe866a770758e87105469a41e33f29c8cc08a79a
parent54bb56e12868100c5ce06e33b4f57b6b2b8f37b9
x86/Viridian: don't mark IRQ vectors as pending when vLAPIC is disabled

In software-disabled state an LAPIC does not accept any interrupt
requests and hence no IRR bit would newly become set while in this
state. As a result it is also wrong for us to mark Viridian IPI or timer
vectors as having a pending request when the vLAPIC is in this state.
Such interrupts are simply lost.

Introduce a local variable in send_ipi() to help readability.

Fixes: fda96b7382ea ("viridian: add implementation of the HvSendSyntheticClusterIpi hypercall")
Fixes: 26fba3c85571 ("viridian: add implementation of synthetic timers")
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Paul Durrant <paul@xen.org>
master commit: 831419f82913417dee4e5b0f80769c5db590540b
master date: 2022-12-02 10:35:32 +0100
xen/arch/x86/hvm/viridian/synic.c
xen/arch/x86/hvm/viridian/viridian.c